In many electronic systems, a single clock signal is split into a plurality of output signals for distribution to a plurality of circuits so each can operate in synchronism with the others. One technique for distributing a signal to a plurality of loads is to utilize a "daisy chain" network consisting of a single line having a plurality of outputs at spaced intervals therealong. A disadvantage of the daisy chain network is that when a signal is launched into a first end of the line, the signal at each output is progressively delayed by an interval proportional to the physical distance of the output from the first end of the line. The propagation delay suffered by each of the output signals can be critical, especially when the frequency of the clock signal exceeds 200 MHz. Thus the daisy chain network is not well suited for distributing a high-frequency clock signal to each of a plurality of loads where each load is to receive a signal having substantially the same amplitude and phase.
A single clock signal also may be distributed to a plurality of loads via a "cluster" network. A typical cluster network consists of a plurality of equal length lines, each carrying a signal from the source to each of the loads which are situated so as to lie along the locus of a circle. The cluster network, whose transmission lines resemble the spokes of a wheel, is often not suitable for many applications because of geometrical constraints. Moreover, as the number of lines within the cluster network increases, the characteristic impedance of each line, as seen by the signal source, decreases, causing a mismatch. The existence of a mismatch gives rise to signal reflections which will likely cause a significant distortion of the amplitude of each output signal.
Thus, there is a need for a technique for distributing a signal from a single source to each of a plurality of loads such that the signal supplied to each load has substantially the same amplitude and phase.